Code:
DefinitionBlock ("cst.aml", "SSDT", 1, "PmRef", "P001Cst", 0x00003001)
{
External (CFGD)
External (PDC0)
External (NCPU)
External (\_PR_.P008, DeviceObj)
External (\_PR_.P007, DeviceObj)
External (\_PR_.P006, DeviceObj)
External (\_PR_.P005, DeviceObj)
External (\_PR_.P004, DeviceObj)
External (\_PR_.P003, DeviceObj)
External (\_PR_.P002, DeviceObj)
External (\_PR_.P001, DeviceObj)
Scope (\_PR.P001)
{
Method (_CST, 0, NotSerialized)
{
If (LAnd (LGreater (NCPU, 0x01), LNot (And (PDC0, 0x10))))
{
Return (Package (0x02)
{
0x01,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
0x01,
0x9D,
0x03E8
}
})
}
If (LAnd (And (CFGD, 0x00200000), And (PDC0, 0x0200)))
{
If (And (CFGD, 0x80))
{
Return (Package (0x05)
{
0x04,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
0x01,
0x01,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x01, // Access Size
)
},
0x02,
0x11,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x01, // Access Size
)
},
0x03,
0x11,
0x015E
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x01, // Access Size
)
},
0x03,
0x11,
0xC8
}
})
}
If (LAnd (LNot (And (CFGD, 0x80)), And (CFGD, 0x40
)))
{
Return (Package (0x04)
{
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
0x01,
0x01,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x01, // Access Size
)
},
0x02,
0x11,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x01, // Access Size
)
},
0x03,
0x11,
0x015E
}
})
}
If (And (CFGD, 0x20))
{
Return (Package (0x03)
{
0x02,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
0x01,
0x01,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x01, // Access Size
)
},
0x02,
0x11,
0x01F4
}
})
}
Return (Package (0x02)
{
0x01,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
0x01,
0x01,
0x03E8
}
})
}
If (And (CFGD, 0x00200000))
{
If (And (CFGD, 0x80))
{
Return (Package (0x05)
{
0x04,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
0x01,
0x20,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000814, // Address
,)
},
0x02,
0x60,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000815, // Address
,)
},
0x03,
0x80,
0x015E
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000816, // Address
,)
},
0x03,
0xA0,
0xC8
}
})
}
If (LAnd (LNot (And (CFGD, 0x80)), And (CFGD, 0x40
)))
{
Return (Package (0x04)
{
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
0x01,
0x20,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000814, // Address
,)
},
0x02,
0x60,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000815, // Address
,)
},
0x03,
0x80,
0x015E
}
})
}
If (And (CFGD, 0x20))
{
Return (Package (0x03)
{
0x02,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
0x01,
0x20,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (SystemIO,
0x08, // Bit Width
0x00, // Bit Offset
0x0000000000000814, // Address
,)
},
0x02,
0x60,
0x01F4
}
})
}
Return (Package (0x02)
{
0x01,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
0x01,
0x01,
0x03E8
}
})
}
Return (Package (0x02)
{
0x01,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
0x01,
0x01,
0x03E8
}
})
}
}
Scope (\_PR.P002)
{
Method (_CST, 0, NotSerialized)
{
If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x10
))))
{
Return (Package (0x02)
{
0x01,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
0x01,
0x9D,
0x03E8
}
})
}
Return (\_PR.P001._CST ())
}
}
Scope (\_PR.P003)
{
Method (_CST, 0, NotSerialized)
{
If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x10
))))
{
Return (Package (0x02)
{
0x01,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
0x01,
0x9D,
0x03E8
}
})
}
Return (\_PR.P001._CST ())
}
}
Scope (\_PR.... UP TO CPU8!
}
How do I go about inserting it into the DSDT? In general, I have seen just the Package (0x04)'s directly, with C1 to C6 and Aliases or Returns to P001._CST, but this one seems to have different CST info depending on CFGD (which varies depending on the OSPM capabilities) and different info (or at least useless code) for each processor.