Any details on your dsdt editing?
Hello,
I am having the same trouble with an xw4400 and 10.5.8: USB not working reliably.
Disabling the useless built-in Ethernet chip helped a bit, removing AppleHPET.kext apparently solves it, great thanks for the tip, but I really would like to have it fixed good at the dsdt level.
However, as you pointed, the dsdt is rather unusual, and there is no Device node, no HPET, no USB, except a list of (more or less) arcane acronyms with a valuer following. So if you'd care to share your patched dsdt, my xw4400 will be VERY happy
Here is the initial dsdt:
-------
DefinitionBlock ("./dsdt.aml", "DSDT", 1, "COMPAQ", "DSDT_PRJ", 0x00000001)
{
OperationRegion (VECT, SystemMemory, 0x000F8000, 0x0100)
Field (VECT, AnyAcc, NoLock, Preserve)
{
Offset (0x04),
NPCI, 32,
SR4G, 32,
Offset (0x20),
HPTB, 32,
Offset (0x36),
ABIO, 32,
APAD, 32,
APLN, 32,
MBBA, 32,
RCBA, 32,
PEXB, 32,
PEXS, 32,
S3SV, 8,
STMS, 8,
WMPI, 8,
PTRP, 8,
WMBH, 8,
WM10, 8,
UPEC, 8,
TPMP, 8,
MORB, 8,
Offset (0x5C),
RSTT, 8
}
OperationRegion (BIOS, SystemMemory, ABIO, 0x1FCB)
Field (BIOS, AnyAcc, NoLock, Preserve)
{
SSMC, 1,
EUWK, 1,
TRPE, 1,
S3RS, 1,
PKWN, 1,
PMWN, 1,
PKWU, 1,
PMWU, 1,
OPKW, 1,
OPMW, 1,
S3OC, 1,
WN98, 1,
WNME, 1,
WN2K, 1,
WNXP, 1,
OSFS, 1,
MLEN, 32,
TM2E, 1,
ESTE, 1,
MBFS, 1,
LPTN, 1,
CM2N, 1,
CM1N, 1,
FPMW, 1,
RPMA, 1,
SATL, 1,
MBAY, 1,
S3AV, 1,
GVCS, 1,
HTTE, 1,
TM2A, 1,
ESTA, 1,
FPYP, 1,
TPMA, 1,
TPMM, 1,
HPTA, 1,
MRBS, 1,
RRTE, 1,
Offset (0x0A),
IHPM, 1,
IHPS, 1,
IHSM, 1,
IHSS, 1,
ATPM, 1,
ATPS, 1,
ATSM, 1,
ATSS, 1,
IHPC, 2,
IHSC, 2,
ATPC, 2,
ATSC, 2,
PITB, 160,
SITB, 160,
S0TB, 160,
S1TB, 160,
PMCC, 8,
PMCB, 448,
PSCC, 8,
PSCB, 448,
SMCC, 8,
SMCB, 448,
SSCC, 8,
SSCB, 448,
S0CC, 8,
S0CB, 448,
S2CC, 8,
S2CB, 448,
S1CC, 8,
S1CB, 448,
S3CC, 8,
S3CB, 448,
STMC, 8,
ODDM, 32,
DCHM, 288,
PS0F, 16,
PS0D, 16,
E00S, 32,
TOPM, 32,
WMIB, 33280,
WMIF, 1,
WMIT, 1,
MBET, 1,
WMIH, 1,
WMIP, 1,
WMIS, 1,
TEVT, 1,
Offset (0x129A),
EAX, 32,
EBX, 32,
ECX, 32,
EDX, 32,
P0FQ, 16,
P1FQ, 16,
TM20, 8,
TM21, 8,
NPRC, 8,
NPST, 8,
SPSI, 256,
SPRI, 64,
PSSA, 32,
PSSZ, 16
}
Field (BIOS, AnyAcc, NoLock, Preserve)
{
Offset (0x0A),
IHMS, 4
}
Field (BIOS, AnyAcc, NoLock, Preserve)
{
Offset (0x24D),
PSF0, 1,
PSF1, 1,
PSF2, 1,
PSF3, 1,
PSF4, 1,
PSF5, 1,
PSF6, 1,
PSF7, 1,
PSF8, 1,
PSF9, 1,
PSFA, 1,
PSFB, 1,
Offset (0x24F),
PSD0, 1,
PSD1, 1,
PSD2, 1,
PSD3, 1,
PSD4, 1,
PSD5, 1,
PSD6, 1,
PSD7, 1,
PSD8, 1,
PSD9, 1,
PSDA, 1,
PSDB, 1,
Offset (0x251)
}
OperationRegion (IDBF, SystemMemory, MBBA, 0x0200)
Field (IDBF, ByteAcc, NoLock, Preserve)
{
MBID, 4096
}
}
---------------
The only part I could guess is this one:
WN98, 1,
WNME, 1,
WN2K, 1,
WNXP, 1,
So... thanks for your help!
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